Please see agenda below.
EventsThursday March 25, 2010
Tuesday March 30, 2010
Start: 5:30 pm
End: 7:00 pm
Date: Tuesday, March 30, 2010 Refreshments: 5:30 to 6:00 pm Location: Emerson Network Power Systems Inc, 610 Executive Campus Dr # 120, Westerville, OH 43082 Title: Emerson Network Power Learning Center: The What, Where, and Why of building a service-centric training facility in the electrical industry. Presenter: Mark Cousino, Manager of Technical Training for Emerson Network Power Liebert Services Register with Jason Byerly by email to jmbyerly@aep.com by 4:00 PM March 29, 2010 Thursday April 8, 2010
Start: 6:30 pm
End: 8:30 pm
Please mark your calendars for this special event. If you are tired of designing your software with a whiteboard, but you hate UML, then textual modeling might be for you. Ever wanted to 'just write some code' but didn't want to actually build the whole product? Just need a prototype, but want it to actually be stable? Then 'M' might be for you. Bill will eschew the slides, fire up ye old text editor and design a piece of software from his upcoming Wrox book on textual modeling. You will learn what 'M' is, what it isn't, and how it is going to help you design better software. This special event is with Bill Sempf a well-known author of several programming books. Location: Google Maps: When A light meal and refreshments will be served. Tuesday April 13, 2010
Start: 5:30 pm
End: 7:00 pm
Date: Tuesday, April13, 2010 Refreshments: 5:30 to 6:00 pm Title: Energy Storage Projects in American Electric Power Presenters: Dr. Ali Nourai (AEP Distribution Research and Technology) & Tom Walker (AEP Grid Management Deployment). Nourai retired from AEP in March and joined KEMA Inc as an executive Please RSVP to Vinod Simha by email to vsimha@aep.com or by phone at 614-552-1717 by 4:00 PM, April 12, 2010. Advise when you RSVP, if IEEE member and/or P.E. Wednesday April 14, 2010
Start: 5:30 pm
End: 6:45 pm
Guest Speaker: Mr. John Paserba When: 5:30-6:45pm Wednesday, April 14th The event will be focused around career management that will be beneficial to all students at any level in their education: freshman, graduating seniors and graduate students. RSVP is required for this event. You must reply to Tejas Kataria at tejas@ieeeosu.org by Tuesday, April 13th at 5pm. Pizza will be provided! Wednesday April 21, 2010
Start: 6:30 pm
End: 8:00 pm
Please join us for our 2010 New Member Reception. We have many activities planned: 1. Networking specialist Laura Rees from roma creative--Learn how to be a better networker! Please join us on 21 April 2010 from 6:30 - 8:00 at the Benchmark bank in Gahanna (directions). Please RSVP online at www.ieeecolumbus.org/node/156 Limited to the first 35 people! Thursday April 22, 2010
Start: 1:30 pm
End: 3:00 pm
ECE Distinguished Seminar Series Suman Datta Thursday, April 22, 2010 Abstract: Since 1926 it is well accepted that the continuous nonzero nature of solutions to Schrodinger’s wave equation used to represent electrons, even in classically forbidden regions of negative kinetic energy, allows for a finite and tunable probability of tunneling from one classically allowed region to another (for example band to band tunneling in a semiconductor). We are investigating a novel transistor architecture based on such tunneling mechanism as a step towards demonstrating steep switching transistors for energy efficient logic and embedded memory applications. In this seminar, we will address the following topics regarding the tunnel transistor architecture: a) the choice of appropriate materials to tune the transfer characteristics over a specified gate swing b) the characteristic screening lengths in these device essential for scaling dc) an effective way to estimate the switching speed of such devices, d) digital circuit design methodologies utilizing tunnel transistors, and, finally, e) the importance of nonequilibrium carrier dynamics on the device terminal characteristics. We will present the experimental tunnel transistor results till date and show that inter-band tunnel transistor is a promising architecture for future low power computing and storage applications. Bio: Suman Datta is the Monkowsky Associate Professor in the Department of Electrical Engineering at the Penn State University with a joint appointment in the Penn State Materials Research Institute. Suman received his Bachelors in Electrical Engineering from the Indian Institute of Technology, Kanpur, India, in 1995 and his Ph.D. in Electrical & Computer Engineering from the University of Cincinnati, USA, in 1999. As a member of the Logic Technology Development and Components Research Group at Intel Corporation, from 1999 to 2007, he was instrumental in the demonstration of the world’s first enhancement and depletion mode indium antimonide based quantum-well transistors operating at room temperature with record power-delay product, the first experimental demonstration of the effect of metal gate plasmon screening and channel strain engineering in mitigating the remote soft optical phonon induced mobility degradation in high-k/metal-gate CMOS transistors and, finally, the investigation of the transport properties and the electrostatic robustness in non-planar “Tri-Gate Transistors” for extreme scalability. Since Fall of 2007 he has been at Penn State University exploring new materials, novel nanofabrication techniques and non-classical device structures for CMOS “enhancement” as well as “replacement” for future energy efficient computing applications. He has over 68 archival refereed journal and conference publications and holds 97 US patents. |
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